The Role:

Performing FPGA based design for various applications such as industrial, commercial, automotive and other allied applications.Handling projects and reporting to FPGA lead. Coordinating with lead and the junior FPGA engineers.

We expect:

  • To have a positive and productive approach towards the organization.
  • Reporting to Lead Engineer on the projects.
  • Good team player having an enigmatic approach towards problem solving, decision-making and innovative skills.

Expertise and Basic Qualifications:

  • Minimum 5 years’ experience in FPGA based RTL design and System design.
  • Very good architecture design experience in Digital HW domain
  • Designing high density FPGAs with deep knowledge of FPGA internal architecture (Xilinx/Altera/other FPGA), FPGA IO Design, understanding device utilization and Vendor IP selection for FPGAs.
  • Good experience in prototype bring-up and functional verification using test bench.
  • Deep Understanding on simulation tools such as Xilinx, Vivado / Questa Sim/ Modelsim/ Octave or similar tool knowledge Environment
  • Deep knowledge and understanding of HDL Verilog/VHDL.
  • Must have done RTL synthesis, constraints design,IO constraints, timing closure, and RTL designs having CDC.
  • Must have used the RTL development and debugging tools for FPGA (vivado, Quartus, Libero and more).
  • Good understanding on any of the Communication (UART, SPI, I2C, Ethernet, etc), Bus (AMBA, AHB, AXI and more) and Memory (DDR and other) Protocols.
  • Good programming skills with script languages (e.g. Python, Perl, Unix shell)
  • Practical experience in hardware debug - use of test equipment (Oscilloscope, Logic Analyzer, Chipscope etc.).

Interested candidates kindly send your detailed curricula vitae and covering letter to the following mail ID.

E-mail careers@chiprimesemiocnductor.com

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